Altium

Design Rule Verification Report

Date:		8/05/2018
Time:		17:50:33
Elapsed Time:		00:00:00
Filename:		C:\Users\Public\Documents\Altium\Projects\amplisourcecommune\PCB1.PcbDoc

Warnings:		0
Rule Violations:		6

Summary

Warnings	Count
Total	0

Rule Violations	Count
Power Plane Connect Rule(Relief Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All)	0
Clearance Constraint (Gap=30mil) (All),(All)	0
Width Constraint (Min=20mil) (Max=20mil) (Preferred=20mil) (All)	0
Modified Polygon (Allow modified: No), (Allow shelved: No)	0
Net Antennae (Tolerance=0mil) (All)	0
Silk primitive without silk layer	0
Silk to Silk (Clearance=10mil) (All),(All)	0
Silk To Solder Mask (Clearance=10mil) (IsPad),(All)	6
Minimum Solder Mask Sliver (Gap=10mil) (All),(All)	0
Hole To Hole Clearance (Gap=10mil) (All),(All)	0
Hole Size Constraint (Min=1mil) (Max=100mil) (All)	0
Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All)	0
Un-Routed Net Constraint ( (All) )	0
Short-Circuit Constraint (Allowed=No) (All),(All)	0
Total	6

Silk To Solder Mask (Clearance=10mil) (IsPad),(All)
Track (2510mil,4550mil)(2510mil,4559mil) Top Overlay	Pad R1-2(2510mil,4600mil) Multi-Layer
Track (2510mil,4341mil)(2510mil,4350mil) Top Overlay	Pad R1-1(2510mil,4300mil) Multi-Layer
Track (2660mil,4055mil)(2660mil,4064mil) Top Overlay	Pad R2-2(2660mil,4105mil) Multi-Layer
Track (2660mil,3846mil)(2660mil,3855mil) Top Overlay	Pad R2-1(2660mil,3805mil) Multi-Layer
Track (2315mil,4210mil)(2315mil,4219mil) Top Overlay	Pad R3-2(2315mil,4260mil) Multi-Layer
Track (2315mil,4001mil)(2315mil,4010mil) Top Overlay	Pad R3-1(2315mil,3960mil) Multi-Layer